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Layout design of 64Mb PCRAM chip based on 40nm process

Qian Wang*, Daolin Cai, Houpeng Chen , Zhitang Song

 

Abstract: The layout design based on 40 nm process for the 64Mb phase change random access memory (PCRAM) chip consists of memory cells and peripheral circuits. The chip size is 3mm X 3mm. 1T1R memory structure with cell size 0.11 μm2 is used. The sidewall structure is used to minish the size of bottom electrode contact, thus to reduce the operation current and the size of the selector transistor in the memory cell. Dummy for transistor poly-silicon gate is used to reduce the process deviation. Symmetrical wire routings are used to balance the RC delay and guarantee the timing.

 

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